Power management circuit and associated power management method

ABSTRACT

A power management circuit includes a voltage sensing circuit and a supply voltage adjusting circuit. The voltage sensing circuit is arranged for sensing a plurality of voltages respectively of a plurality of nodes of a PCB to generate a sensing result. The supply voltage adjusting circuit is coupled to the voltage sensing circuit, and is arranged for determining a voltage level of a supply voltage supplied to a power plane of the PCB by referring to the sensing result.

CROSS REFERENCE TO RELATED APPLICATION

This is a continuation of the co-pending U.S. application Ser. No.14/499,267 (filed on Sep. 29, 2014). The entire content of the relatedapplications is incorporated herein by reference.

BACKGROUND

In the past, a printed circuit board (PCB) generally uses a single powermanagement integrated circuit (PMIC) to provide a supply voltage tomultiple ICs/components. IR drop (i.e. voltage drop) variation amongICs/components may be insignificant because a current sink of eachIC/component is small. However, for higher performance ICs/componentswhich have higher power consumption but still need to be supplied by asingle PMIC, IR drop variation is getting more serious. Therefore, howto accurately compensate IR drop becomes an important topic.

SUMMARY

It is therefore an objective of the present invention to provide a powermanagement circuit and associated power management method, which mayaccurately compensate IR drop, to solve the above-mentioned problems.

According to one embodiment of the present invention, a power managementcircuit comprises a voltage sensing circuit and a supply voltageadjusting circuit. The voltage sensing circuit is arranged for sensing aplurality of voltages respectively of a plurality of nodes of a PCB togenerate a sensing result. The supply voltage adjusting circuit iscoupled to the voltage sensing circuit, and is arranged for determininga voltage level of a supply voltage supplied to a power plane of the PCBby referring to the sensing result.

According to another embodiment of the present invention, a powermanagement method comprises: sensing a plurality of voltagesrespectively of a plurality of nodes of a PCB to generate a sensingresult; and determining a voltage level of a supply voltage supplied toa power plane of the PCB by referring to the sensing result.

According to another embodiment of the present invention, a powermanagement method comprises: obtaining operation statuses of a pluralityof ICs mounted on a PCB to generate a determining result; anddetermining a voltage level of a supply voltage supplied to a powerplane of the PCB by referring to the determining result.

These and other objectives of the present invention will no doubt becomeobvious to those of ordinary skill in the art after reading thefollowing detailed description of the preferred embodiment that isillustrated in the various figures and drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram illustrating a power management circuit according toone embodiment of the present invention.

FIG. 2 is a diagram illustrating the voltage sensing circuit accordingto one embodiment of the present invention.

FIG. 3 is a diagram illustrating the voltage sensing circuit accordingto another embodiment of the present invention.

FIG. 4 is a diagram illustrating a power management circuit according toanother embodiment of the present invention.

FIG. 5 shows a method of a power management method according to oneembodiment of the present invention.

FIG. 6 is a diagram illustrating a power management circuit according toanother embodiment of the present invention.

FIG. 7 shows a method of a power management method according to anotherembodiment of the present invention.

DETAILED DESCRIPTION

Certain terms are used throughout the following description and claimsto refer to particular system components. As one skilled in the art willappreciate, manufacturers may refer to a component by different names.This document does not intend to distinguish between components thatdiffer in name but not function. In the following discussion and in theclaims, the terms “including” and “comprising” are used in an open-endedfashion, and thus should be interpreted to mean “including, but notlimited to . . . ” The terms “couple” and “couples” are intended to meaneither an indirect or a direct electrical connection. Thus, if a firstdevice couples to a second device, that connection may be through adirect electrical connection, or through an indirect electricalconnection via other devices and connections.

Please refer to FIG. 1, which is a diagram illustrating a powermanagement circuit 100 according to one embodiment of the presentinvention. As shown in FIG. 1, the power management circuit 100 has avoltage sensing circuit 110 and a power management integrated circuit(PMIC) 120, where the PMIC 120 includes a supply voltage adjustingcircuit 122, and the voltage sensing circuit 110 is built in a chipexternal to the PMIC 120. The power management circuit 100 is positionedon a printed circuit board (PCB) 102, where the PCB 104 has a pluralityof ICs mounted thereon (in this embodiment, there are six ICs: IC1-IC6).It is noted that the voltage sensing circuit 110 not only can beimplemented inside a chip, but also can be implemented outside a chip,such as implemented by a circuit composed of electronic components onthe PCB 102.

The PCB 102 has a power plane (i.e. the Vcc plane 104 shown in FIG. 1),the power management circuit 100 and IC1-IC6 are positioned on the Vccplane, and the Vcc plane 104 of the PCB 102 is shared by the powermanagement circuit 100 and IC1-IC6. In this embodiment, the PCB 102 hasonly one PMIC, and the supply voltage adjusting circuit 122 of the PMIC120 is arranged for determining a voltage level of a supply voltagesupplied to the Vcc plane, and at least the voltage sensing circuit 110and IC1-IC6 receive the supply voltage from the Vcc plane 104.

In the operations of the power management circuit 100, the voltagesensing circuit 110 senses a plurality of voltages respectively of aplurality of nodes of the PCB 102 to generate a sensing result. in theembodiment shown in FIG. 1, the voltage sensing circuit 110 sensesvoltage levels of the supply voltage received by IC1-IC6, respectively,to generate the sensing result. The sensing result generated by thevoltage sensing circuit 110 can be information about a lowest voltageamong the sensed voltages, or information about an average of the sensedvoltages, or any information which can be used to represent the supplyvoltage distribution or IR drop degree of the PCB 102. Then, the PMIC120 receives the sensing result, and the supply voltage adjustingcircuit 122 determines the voltage level of the supply voltage byreferring to the sensing result.

In this embodiment, source of the supply voltage supplied to the Vccplane 104 of the PCB 102 may be provided by a power generating circuit(not shown) or a power supply device (not shown), and the PMIC 120 maydetermine a voltage level of the supply voltage by referring to a targetvoltage level and the sensing results. Thus, a required supply voltageis provided to the Vcc plane 104 of the PCB 102.

In the embodiment shown in FIG. 1, when the IC1-IC6 have higher powerconsumption and a large current sink, the operation status of each ICmay result in different IR drop. For example, assuming that IC1 isactive and IC2-IC6 are inactive, the voltage sensing circuit 110 sensesthat the voltage level of the supply voltage received by IC1 has 6% IRdrop, and the voltage sensing circuit 110 senses that the voltage levelof the supply voltage received by IC6 has 2% IR drop (among IC1-IC6, IC1is closest to the PMIC 120), the voltage sensing circuit 110 mayfeedback the lowest voltage (i.e. the sensed voltage from IC1) to thePMIC 120, and the supply voltage adjusting circuit 122 may increase thesupply voltage provided to the Vcc plane 104 to compensate the IR drop(e.g. compensate 6% IR drop).

In the embodiment shown in FIG. 1, the voltage sensing circuit 110 isbuilt in the chip external to the PMIC 120. In other embodiment,however, the voltage sensing circuit 110 can be integrated in the PMIC120 for cost reduction and higher accuracy. This alternative designshall fall within the scope of the present invention.

Please refer to FIG. 2, which is a diagram illustrating the voltagesensing circuit 110 according to one embodiment of the presentinvention. As shown in FIG. 2, the voltage sensing circuit 110 includesa plurality of filters (in this embodiment, there are six low-passfilters 210_1-210_6), multiplexer 220, an analog-to-digital converter(ADC) 230 and a controller 240. In the operations of the voltage sensingcircuit 110, the low-pass filters 210_1-210_6 receives the sensedvoltages 1-6, respectively; the multiplexer 220 receives filteredvoltages from the low-pass filters 210_1-210_6, and sequentially outputsthe filtered voltages; the ADC 230 receives the filtered voltages fromthe multiplexer 220, and performs analog-to-digital convertingoperations upon the filtered voltages to generate digital form of thefiltered voltages; and the controller 240 generates the sensing resultaccording to the digital form of the filtered voltages.

In addition, in the embodiment shown in FIG. 2, the multiplexer 230 iscontrolled to sequentially output the filter voltages from the low-passfilters 210_1-210_6 to the ADC 230. However, in other embodiment, themultiplexer 230 can be controlled to output only a portion of thefiltered voltages to the ADC 230. This alternative design shall fallwithin the scope of the present invention.

Please refer to FIG. 3, which is a diagram illustrating the voltagesensing circuit 110 according to another embodiment of the presentinvention. As shown in FIG. 3, the voltage sensing circuit 110 has aplurality of resistors R1-R6, wherein each of the resistor R1-R6 has afirst node and a second node, the first nodes of the resistors R1-R6 arecoupled to the nodes of the PCB to receive the sensed voltages 1-6,respectively, and the second node of each resistor is coupled to anoutput node N_(out) for providing the sensing result.

Please refer to FIG. 4, which is a diagram illustrating a powermanagement circuit 400 according to another embodiment of the presentinvention. As shown in FIG. 4, the power management circuit 400 has avoltage sensing circuit 410 and a PMIC 420, where the PMIC 420 includesa supply voltage adjusting circuit 422, and the voltage sensing circuit410 is built in a chip external to the PMIC 420. The power managementcircuit 400 is positioned on a PCB 402, where the PCB 404 has aplurality of ICs mounted thereon (in this embodiment, there are six ICs:IC1-IC6).

The PCB 402 has a power plane (i.e. the Vcc plane 404 shown in FIG. 4),the power management circuit 410 and IC1-IC6 are positioned on the Vccplane, and the Vcc plane 404 of the PCB 402 is shared by the powermanagement circuit 410 and IC1-IC6. In this embodiment, the PCB 402 hasonly one PMIC, the supply voltage adjusting circuit 422 of the PMIC 420is arranged for determining a voltage level of a supply voltage suppliedto the Vcc plane, and at least the voltage sensing circuit 410 andIC1-IC6 receive the supply voltage from the Vcc plane 404.

In the operations of the power management circuit 400, the voltagesensing circuit 410 senses a plurality of voltages respectively of aplurality of nodes of the PCB 402 to generate a sensing result. in theembodiment shown in FIG. 4, the voltage sensing circuit 410 sensesvoltage levels of the nodes N1-N3 of the Vcc plane 404, respectively, togenerate the sensing result, where the node N1 is close to IC1, the nodeN2 is close to IC4, and the node N3 is close to IC6. The sensing resultgenerated by the voltage sensing circuit 410 can be information about alowest voltage among the sensed voltages, or information about anaverage of the sensed voltages, or any information which can be used torepresent the supply voltage distribution or IR drop degree of the PCB402. Then, the PMIC 420 receives the sensing result, and the supplyvoltage adjusting circuit 422 determines the voltage level of the supplyvoltage by referring to the sensing result, and generating the supplyvoltage to the Vcc plane 404 of the PCB 402.

It is noted that the locations of the nodes N1-N3 and the quantity ofthe nodes to be sensed shown in FIG. 4 are for illustrative purposesonly. The locations of the nodes N1-N3 and the quantity of the nodes tobe sensed can be changed according to designer's consideration.

In the embodiment shown in FIG. 4, the voltage sensing circuit 410 isbuilt in the chip external to the PMIC 420. In other embodiment,however, the voltage sensing circuit 410 can be integrated in the PMIC420 for cost reduction and higher accuracy. This alternative designshall fall within the scope of the present invention.

Please refer to FIG. 5, which shows a method of a power managementmethod according to one embodiment of the present invention. Referringto FIGS. 1, 4 and 5 together, the method is described as follows:

Step 500: the method starts.

Step 502: sense a plurality of voltages respectively of a plurality ofnodes of a PCB to generate a sensing result.

Step 504: determine a voltage level of a supply voltage by referring tothe sensing result.

Step 506: generate the supply voltage to a power plane of the PCB.

In another embodiment, after the supply voltage is generated to thepower plane of the PCB, the voltage could be influenced by powerconsumption of the devices on the PCB 102 (such as the power managementcircuit 100 and IC1-IC6). Thus, a plurality of new voltages respectivelyof the nodes are still be sensed to generate a new sensing result anddetermine a new supply voltage until the sensed voltage is stable. Inother word, the method can be seen as a closed loop method.

Please refer to FIG. 6, which is a diagram illustrating a powermanagement circuit 600 according to another embodiment of the presentinvention. As shown in FIG. 6, the power management circuit 600 has amicro-processor (MCU) 610 and a PMIC 620, where the MCU includes alook-up table (LUT) 612. The power management circuit 600 is positionedon a PCB 602, where the PCB 602 has a plurality of ICs mounted thereon(in this embodiment, there are six ICs: IC1-IC6).

The PCB 602 has a power plane (i.e. the Vcc plane 604 shown in FIG. 6),the power management circuit 610 and IC1-IC6 are positioned on the Vccplane, and the Vcc plane 604 of the PCB 602 is shared by the powermanagement circuit 610 and IC1-IC6. In this embodiment, the PMIC 620 isarranged for determining a voltage level a supply voltage supplied tothe Vcc plane, and at least the MCU 610 and IC1-IC6 receive the supplyvoltage from the Vcc plane 604.

The LUT 612 is built off-line, and the LUT 612 records combinations ofthe operation statuses of IC1-IC6 and corresponding voltage levels ofthe power supply. It is noted that the operation statuses could comprisethe active/inactive statuses (on/off) or operation modes of IC1-IC6, orthe active/inactive statuses of data transfer paths of IC1-IC6respectively.

In the operations of the power management circuit 600, because the MCU610 knows the operation statuses of IC1-IC6 all the time, therefore, theMCU 610 may determine the voltage level of the supply voltage byreferring a look-up table. Then, the MCU 610 transmits the informationabout the voltage level of the supply voltage to the PMIC 620, and thePMIC 620 generates the voltage level of the supply voltage to the Vccplane 604.

For example, when the MCU 610 determines that IC1 and IC3 are active andIC2 and IC4-IC6 are inactive, the MCU 610 may determine a first voltagelevel of the supply voltage by referring to the look-up table, and thePMIC 620 may generate the supply voltage having the first voltage levelto the Vcc plane 604. In addition, when the MCU 610 determines thatIC5-IC6 are active and IC1-IC4 are inactive, the MCU 610 may determine asecond voltage level of the supply voltage by referring to the look-uptable, and the PMIC 620 may generate the supply voltage having thesecond voltage level to the Vcc plane 604.

It is noted that the circuit structure shown in FIG. 6 is forillustrative purposes only. In other embodiments of the presentinvention, the LUT 612 can be built in the PMIC 620, and the MCU merelyprovides the information about the operation statuses of IC1-IC6 to thePMIC 620; or the information about the operation statuses of IC1-IC6 canbe provided by other circuits. These alternative designs shall fallwithin the scope of the present invention.

Please refer to FIG. 7, which shows a method of a power managementmethod according to another embodiment of the present invention.Referring to FIGS. 6-7 together, the method is described as follows:

Step 700: the method starts.

Step 702: obtain operation statuses of a plurality of ICs mounted on aPCB to generate a determining result.

Step 704: determine a voltage level of a supply voltage by referring tothe determining result.

Step 706: generate the supply voltage to a power plane of the PCB.

Briefly summarized, in the power management circuit and power managementmethod of the present invention, by sensing the voltages of differentlocations of the PCB, or by determining the operation statuses of theICs, the IR drop can be accurately compensated, especially when the ICshave higher power consumption and large current sink.

Those skilled in the art will readily observe that numerousmodifications and alterations of the device and method may be made whileretaining the teachings of the invention. Accordingly, the abovedisclosure should be construed as limited only by the metes and boundsof the appended claims.

What is claimed is:
 1. A power management circuit, comprising: a voltagesensing circuit, for sensing a plurality of voltages respectively of aplurality of nodes of a printed circuit board (PCB) to generate asensing result; and a supply voltage adjusting circuit, coupled to thevoltage sensing circuit, for determining a voltage level of a supplyvoltage supplied to a power plane of the PCB by referring to the sensingresult.
 2. The power management circuit of claim 1, wherein the PCB hasa plurality of integrated circuits (ICs) mounted thereon, the powerplane of the PCB is shared by the ICs, and the voltage sensing circuitsenses voltage levels of the supply voltage received by the ICs,respectively, to generate the sensing result.
 3. The power managementcircuit of claim 1, wherein the PCB has a plurality of ICs mountedthereon, the power plane of the PCB is shared by the ICs, and thevoltage sensing circuit senses voltage levels close to at least aportion of the ICs to generate the sensing result.
 4. The powermanagement circuit of claim 1, wherein the sensing result is informationabout a lowest voltage among the voltages of the nodes of the PCB. 5.The power management circuit of claim 1, wherein the sensing result isinformation about an average of the voltages of the nodes of the PCB. 6.The power management circuit of claim 1, wherein the voltage sensingcircuit receives the plurality of voltages of the nodes of the PCB, andthe sensing result is generated according to only a portion of thesensed voltages.
 7. The power management circuit of claim 1, wherein thesupply voltage adjusting circuit is built in a power managementintegrated circuit (PMIC), and the voltage sensing circuit is built in achip external to the PMIC.
 8. A power management method, comprising:sensing a plurality of voltages respectively of a plurality of nodes ofa printed circuit board (PCB) to generate a sensing result; anddetermining a voltage level of a supply voltage supplied to a powerplane of the PCB by referring to the sensing result.
 9. The powermanagement method of claim 8, wherein the PCB has a plurality ofintegrated circuits (ICs) mounted thereon, the power plane of the PCB isshared by the ICs, and the step of generating the sensing resultcomprises: sensing voltage levels of the supply voltage received by theICs, respectively, to generate the sensing result.
 10. The powermanagement method of claim 8, wherein the PCB has a plurality of ICsmounted thereon, the power plane of the PCB is shared by the ICs, andthe step of generating the sensing result comprises: sensing voltagelevels close to at least a portion of the ICs to generate the sensingresult.
 11. The power management method of claim 8, wherein the sensingresult is information about a lowest voltage among the voltages of thenodes of the PCB.
 12. The power management method of claim 8, whereinthe sensing result is information about an average of the voltages ofthe nodes of the PCB.
 13. The power management method of claim 8, thestep of generating the sensing result comprises: filtering the voltagesof the nodes of the PCB; performing analog-to-digital convertingoperations upon filtered voltages to generate digital form of thefiltered voltages; and generating the sensing result according to thedigital form of the filtered voltages.
 14. The power management methodof claim 8, wherein the sensing result is generated according to only aportion of the sensed voltages.
 15. A power management method,comprising: obtaining operation statuses of a plurality of integratedcircuits (ICs) mounted on a printed circuit board (PCB) to generate adetermining result; and determining a voltage level of a supply voltagesupplied to a power plane of the PCB by referring to the determiningresult.
 16. The power management method of claim 15, wherein theoperation status of each IC is an active status or inactive status ofthe IC.
 17. The power management method of claim 15, wherein the step ofdetermining the voltage level of the supply voltage comprises:determining the voltage level of the supply voltage by using a look-uptable, wherein the look-up table records combinations of the operationstatuses of the ICs and corresponding voltage levels.
 18. The powermanagement method of claim 17, wherein the look-up table is builtoff-line.
 19. The power management method of claim 17, wherein theoperation status of each IC is an active status or inactive status ofthe IC.
 20. The power management method of claim 15, wherein thedetermining step is performed by a microprocessor, and the powermanagement method further comprises: transmitting information about thedetermining voltage level of the supply voltage from the microprocessorto a power management integrated circuit (PMIC) to adjust the supplyvoltage supplied to the power plane of the PCB.